Sunidhi Pawar M

Aspiring VLSI and Embedded Systems Engineer

M.Tech candidate at PES University designing efficient, low-power SoC hardware and connected embedded systems. I work from Verilog and silicon-level design up to IoT firmware and the cloud.

Connect on LinkedInSee my projects
Portrait of Sunidhi Pawar M
8.82CGPA, M.Tech at PES University
70%Less manual setup time through Terraform automation
IEEEPaper presented and published at ICSCSA
3Hardware design tools: Virtuoso, Vivado, LTspice

Hardware first, cloud aware

I'm an Electronics and Communication engineer specializing in VLSI and embedded systems. I enjoy the full path from a scheduling idea to a timing-clean design on an FPGA, and from a sensor to a dashboard.

An Azure DevOps internship taught me how to automate, containerize and monitor systems. I now use that to connect hardware to the cloud for IoT products.

VLSI and embedded

  • Circuit design
  • Layout design
  • Embedded systems
  • Verilog
  • C/C++
  • IoT

Cloud and DevOps

  • Azure
  • Azure DevOps
  • CI/CD
  • Docker
  • Kubernetes
  • Terraform
  • Networking

Tools

  • Cadence Virtuoso
  • Xilinx Vivado
  • LTspice
  • Keil µVision

Working style

  • Teamwork
  • Adaptability
  • Flexibility

Projects

Hybrid SoC Arbiter with Scheduling-Based Algorithms and Power Optimization

M.Tech project, in progress

  • Developing an arbiter that combines Deadline Monotonic, Round Robin and Earliest Deadline First scheduling for shared resources.
  • A traffic monitor picks the best arbitration scheme as resource contention changes.
  • Idle detection and clock gating cut unnecessary switching and dynamic power.
  • Built in Verilog on Xilinx Vivado (Artix-7), evaluated on latency, fairness, utilization, timing, deadline misses and power.
  • Verilog
  • Vivado
  • Artix-7
  • Low power
  • SoC

Real-Time Asset Tracking and Management System

Published at IEEE ICSCSA

  • Cost-effective prototype for real-time asset tracking with Arduino Uno, ESP8266, LoRa and a NEO-6M GPS module, programmed in C/C++.
  • GPS and LoRa give accurate location with long-range communication.
  • Cloud-based remote monitoring over Wi-Fi, with an interactive front end.
  • On-device LCD and keypad for status and input.
  • Arduino
  • ESP8266
  • LoRa
  • GPS
  • IoT

Experience

Intern, RecsTech Technology Private Limited

Nov 2024 to Mar 2025 · Bangalore

  • Deployed and managed Azure Virtual Machines, Storage Accounts and Virtual Networks.
  • Built CI/CD pipelines in Azure DevOps for faster, more reliable delivery.
  • Containerized apps with Docker and orchestrated them with Kubernetes.
  • Cut manual setup time by 70% with Terraform.
  • Added observability with Azure Monitor, Prometheus and Grafana.

Education and recognition

M.Tech, VLSI and Embedded SystemsPES University, Bangalore · 2025 to 2027 · CGPA 8.82
B.E., Electronics and Communication EngineeringCMR Institute of Technology · 2021 to 2025 · CGPA 8.0
Pre-University, ScienceCarmel Convent PU College · 2021 · 80.83%
Microsoft Azure Fundamentals (AZ-900)Certification
100 AICTE activity pointsFrom 5 social activities under the college curriculum
LanguagesEnglish, Hindi, Kannada, Marathi

Let's build something efficient

I'm looking for VLSI and embedded systems opportunities. Message me on LinkedIn and I'll reply quickly.

linkedin.com/in/sunipawar
Bangalore, India